Ultra–Fast Noise Immune CMOS Threshold Logic Gates
نویسنده
چکیده
This paper details a systematic method for significantly improving the noise margins of very fast threshold gates. The method is based on adding nonlinear terms determined from the Boolean form of the threshold function to be implemented. Simulation results support our theoretical claims. Finally, two methods for drastically reducing the dissipated power of such threshold gates down to <50%, and respectively <10% are also suggested.
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تاریخ انتشار 2000